Overview of single-phase-shift dual active bridge converter operation analysis design guidelines and

Abstract

Introduction

The dual-active bridge (DAB) converter was first introduced in the early 1990s [1]. Nowadays, it has become an indispensable part of most industrial dc-dc power conversion systems. High power density, zero-voltage switching (ZVS), bidirectional power flow, voltage matching, and galvanic isolation are the most important capabilities that make it prominent in the next generation of dc-dc power conversions. Compared to other isolated topologies, DAB converter has now become a very popular topology, especially for distributed generating systems [2-5], energy conversion [6-9], and storage applications [10-13]. The most attractive way to control the DAB converter is to use phase-shift modulation techniques. The first phase-shift modulation was presented when the DAB converter was proposed in [1]. This is called conventional single-phase-shift (SPS) modulation in literature. The performance characteristics of the DAB converter under SPS control are examined in [14]. In this study, the regions of soft-switching for both bridges are identified, and the impacts of parasitic elements on the regions are also discussed. More detailed analyses on the converter are conducted in [15-18]. The paper in [16] details the operation modes of the DAB converter with SPS control according to load conditions (light and heavy load) and derives the mathematical expressions for each possible operation modes. Some key analyses are also made on voltage ripple, deadband effect, and safe operating area (SOA). In [19], several practical considerations, such as switches capacitance, dead time, series inductance design, and input/output voltage variation, are considered to fully analyze the ZVS range of the converter. Different purpose design strategies and techniques to improve the performance of the DAB converter with SPS control are presented in [20]. The study proposes two different design approaches to increase the soft-switching operation range and to improve efficiency at full load. Moreover, some modifications that can be made to improve the performance of the converter are also mentioned. Using the SPS modulation method, it is quite difficult to remain the converter in the ZVS region at different voltage conversion ratios over the entire power range. The ZVS range of the converter will narrow as the voltage conversion ratio moves away from unity and will even disappear completely for light load conditions. Moreover, power flow control is dependent on the leakage inductance of the transformer, leading to high-circulating power when the voltages on both sides of the transformer are mismatched [21,22]. This causes both root-mean-square (RMS) and peak currents to increase. The above troubles boost power losses and adversely affect the efficiency of the converter. In recent years, to tackle these challenges and improve converter efficiency, some typical phase-shift modulation methods, such as Dual-Phase-Shift (DPS) modulation [23], extended-phase-shift (EPS) modulation [2,24], and triplephase-shift (TPS) modulation [25] have been proposed.

Compared with the SPS modulation, these include multiple modulation parameters, which increase the degree of freedom in the control. The TPS modulation is general since it has three control freedoms, and the DPS and EPS modulations with two degrees of freedom are considered as the special cases of that [22]. Multiple degrees of freedom allow the converter to reduce the current stress, extend the ZVS operating range, and decrease the reactive (backflow) power [21,22,26]. Therefore, the TPS modulation can typically exhibit better performance in power efficiency than others [22,26]. The necessity to determine multiple modulation parameters brings several difficulties in their analysis and control process. To this end, many efficiency optimization strategies are combined with the DPS, EPS, and TPS techniques to determine the modulation parameters. The optimal modulation schemes recently introduced have made the converter operate with minimized RMS current [27-29], reduced conduction losses [30] and power losses [24,31-33], decreased current stress [34-36], and minimized reactive power [23,37]. Moreover, some of these studies have combined soft switching optimization with RMS current minimization [27,28] and reactive power reduction [37] to extend the ZVS operation range. However, all these schemes suffer from complex calculations and a high computational burden. This means that real-time implementations will become quite challenging, especially for the TPS modulation. As a way to solve the realization difficulty, most schemes [26,28,31] utilize lookup tables (LUTs) which store the modulation parameters optimized in advance under different operating conditions. To extract the modulation variables in practice, the current operating conditions are first detected, and then these LUTs are searched. This situation results in low accuracy and unsatisfactory modulation performance due to the inherent discrete outputs of LUTs [33,34]. As another solution, some researchers have developed artificial intelligence-based approaches, such as neural network and fuzzy inference system [33,34], deep reinforcement learning [32], data-driven [36] and augmented Lagrangian method [37]. Such techniques enable online calculations in determining the optimum modulation variables and come to the fore in the context of low computation and automating the control process. Despite the benefits of more than one degree of freedom offered by DPS, EPS, and TPS modulation techniques, SPS modulation still remains relevant, especially for applications that prioritize simplicity and cost-effectiveness. The rationale underlying this claim can be expressed as the modulation process being less complex and easier to implement. The most primitive and traditional methods for the control of the DAB converter are single-loop voltage or current feedback control schemes. Voltage mode control is used to regulate the output voltage in case of unidirectional power flow. Current mode control is preferred to regulate bidirectional power flow between two sources. The dynamic performance of both two traditional methods under load

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changes is quite poor. Therefore, this situation has caused many researchers to focus on advanced control schemes to enhance the dynamic response and static performance of the converter. In [38], to increase the stability margin of voltage mode control, a linearized control method has been proposed. In this control, unlike the traditional scheme, a linearization operator is used. Thus, by eliminating or compensating the nonlinear terms between the output current and the phase shift ratio, the sensitivity of the stability of the voltage mode control to the load condition is reduced. The voltage mode control has also been improved by using an inner current loop in addition to the outer voltage loop. This is also called average current control (ACC), and it is generally used to control the current in any circuit branch [39]. In this scheme, when the output current is fed back, not only the output power can be directly controlled but also overcurrent protection can be provided. However, in some studies, the feedback current for the DAB converter is also taken as the secondary side bridge current [40,41], the output load current [41], the active component of the transformer leakage inductance current [42], or the output LC filter current [43,44]. The two-closed loop control, like voltage mode control, exhibits slow transient responses during load changes. The reason for this is clarified as a result of the analyses made in [41] and it is stated that it is due to the high closed-loop output impedance. Load current feedforward (LCFF) controls have been proposed in [40,41,45] to reduce the closed-loop output impedance and thus accelerate the load step response. As an alternative to voltage mode control, a model-based phase shift (MPS) control has been presented in [46,47] for the converter feeding a resistive load. The MPS control is based on directly calculating the desired phase-shift ratio, and thus it requires both estimating the load resistance online and measuring the load current and input voltage accurately. In general, it is quite sensitive to the converter parameters and exhibits relatively poor dynamic responses to load changes. To improve the overall performance of the MPS control, a PI controller has been adapted to this scheme [47], and it was called enhanced-MPS (e-MPS) control. Recently, direct power (DP) control, which is widely used in renewable generation systems, is emerging as an effective method to achieve robust dynamic response. In the DAB converters, the DP control has been developed in different ways using the relationship between the transferred power and the phase shift ratio. The common goal is to ensure that the converter reaches the desired output power quickly. Basic DP control is presented in [48,49] for the DAB converter. As in the e-MPS control, the basic scheme is dependent on the converter parameters, and it is also necessary to feed forward the load current and input voltage precisely. A different approach to DP control is proposed in [50]. In this method, defined as virtual DP (VDP), the necessity of using converter parameters to calculate the desired phase shift ratio is eliminated, but it still requires feedforward. All the control schemes outlined above use traditional

PI controllers to deal with input voltage fluctuations and load variations. Thus, this study has referred to them as PI-based control schemes. In recent years, superior control strategies to PI-based control schemes have also been proposed, such as model predictive control [51-53], sliding mode approaches [54-56], and disturbance observer-based control [57-59]. These advanced control methods are more robust to disturbances in input voltage and load variation, model uncertainty, and circuit parameter variations when compared to PI-based schemes. However, they are quite complex to implement and require a small signal model of the converter for their design. A comprehensive review of advanced control methods is presented in [60]. This study discusses five different control strategies based on conventional PI controller. The reasons for focusing on PI-based control schemes are as follows: (i) their implementation cost and complexity are low, (ii) they do not require a small signal model of the converter for their design, (iii) they are widely used since they can be easily designed in the time domain, (iv) controller parameters can be adjusted by the trial-and-error method, and also metaheuristic optimization algorithms are easy to apply in parameter tuning. The main contributions of this paper are: (i) A comprehensive analysis is presented for the DAB converter with SPS control. This study has a complementary nature to previous studies. (ii) Some practical considerations are discussed regarding design procedures. Based on the turn ratio tradeoffs, a simple guide is proposed to the designers for their design, especially in a wide input voltage range. It allows the converter to operate in the ZVS region as much as possible over a wide power range. (iii) This study comprehensively discusses five different PI-based control strategies. A detailed comparative analysis on the transient and steady-state responses of these strategies is presented, and the control scheme that gives the best dynamic and static performance is determined. The paper is organized into six sections. In Section 2, the basic operation principle of the DAB converter is briefly examined. Besides, the steady-state analysis of the converter is carried out, and some mathematical derivations are made on the average values, output voltage, and output voltage ripple. At the end of this section, the regions of soft-switching for both bridges are shortly discussed. Some practical design considerations and guidelines are given in Section

3. In Section 4, PI-based control strategies are explained in

detail. The simulation results are given in Section 5, and the drawn conclusions are evaluated in Section 6.

Dual-Active Bridge Converter

Basic Operation Principle The simplified circuit diagram of a single-phase DAB converter is shown in Figure 1(a). It typically consists of two full bridges interfaced through a high-frequency

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transformer. The inductor L is usually defined as the sum of the auxiliary inductor in series with the transformer and the leakage inductance of the transformer itself. The transformer allows a high voltage conversion ratio when its turn ratio is set appropriately, as well as providing galvanic isolation. The power flow between two full bridges is bidirectional in the presence of an active load, and conceptually, it is similar to the power transmission in a traditional AC power system. This analogy is depicted in Figure 1(b), where all quantities are referred to the primary side. Fundamentally, the DAB converter can be easily controlled using conventional SPS modulation. In this scheme, there is a certain phase-shift between the gate signals of two bridges, and all switches operate at constant pulse width with a 50% duty cycle. Figure 2 illustrates the basic theoretical waveforms of the converter for the main operation mode (V1 = NV2) under SPS control. As seen in Figure 2, the primary and secondary voltages of the transformer are high-frequency square waves, which are out of phase, and the primary voltage is in leading phase relative to the secondary one. Therefore, power is delivered from the primary side bridge towards the other, which is referred to as forward power flow. The direction of power flow and magnitude can be controlled by adjusting the sign and value of the phase-shift between two bridges properly. The DAB converter can further operate in two distinct modes other than main operating mode. In general, these are defined based on the following voltage conversion ratio:

Figure 2. Basic theoretical waveforms for main operation mode (V1 = NV2) under SPS control, where Ts = 1 ⁄ fs and fs is the switching frequency.

Figure 1. (a) Simplified circuit diagram of the DAB converter. (b) Equivalent schematic of the DAB converter with phaseshift control. (N = np⁄ns is the turn ratio of the transformer, and vs´, is´ are quantities reduced to the primary side.).

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mathematical derivations, and it will be discussed in more detail for all possible operating modes by performing the steady-state analysis in the next subsection.

(1) where m < 1, m = 1, and m > 1 represent buck (V1 > NV2), main (V1 = NV2), and boost (V1 < NV2) operation modes, respectively. Similar theoretical waveforms for m < 1 and m > 1 are presented in detail under different load conditions in Figure 3 and Figure 4. It is seen that the inductor current for m = 1 is always trapezoidal regardless of load conditions, and yet it varies with light and heavy load conditions for m < 1 and m > 1. The analysis of the inductor current is quite significant in obtaining some important

Steady-State Analysis To simplify the steady-state analysis, the following assumptions are made: (i) the winding resistances and magnetizing inductance of the transformer are neglected, (ii) all semiconductor devices are ideal, that is the parasitic and snubber capacitance are ignored, (iii) the dead-time effect and switching dynamics are neglected, (iv) all quantities are addressed to the primary side of the transformer. Under these assumptions, four different segments in the inductor current occur during

Figure 3. Basic theoretical waveforms for buck operation mode (V1 > NV2 or m < 1) under (a) heavy, (b) boundary, and (c) light load conditions.

Figure 4. Basic theoretical waveforms for boost operation mode (V1 < NV2 or m > 1) under (a) heavy, (b) boundary, and (c) light load conditions.

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only one switching period, as shown in Figure 2, Figure 3, and Figure 4. In each segment, the difference between the primary and secondary voltages of the transformer appears across the for ∆t → 0, the slope of the inducinductor, and since tor current can be approximated by

where iL (t3) and iL (t4) are the inductor current values at the instant of t3 and t4, respectively. On the other hand, given the symmetrical waveform of the current, the following definitions are made: (7)

(2) where ∆iL is the change of the current in the related segment and ∆t is the time interval of this segment. With this approach, the change in inductor current is assumed to be linear over the interval ∆t. Consequently, when only concerning the waveforms in Figure 3(a), the inductor current analysis is realized as follows: Segment 1 [t0, t1]: The inductor current increases from a negative initial value iL(t0) < 0 to a positive value iL(t1) > 0 throughout this segment. The time interval is equal to ∆t = tφ, and also the voltage across the inductor is vL = V1 + NV2. Hence, the inductor current increment ∆iL is defined from Eq. (2) as (3) where iL (t0) and iL (t1) are the inductor current values at the instant of t0 and t1, respectively. tφ is the phase-shift in and ϕ is the phase-shift angle, 0 < ϕ < π/2. times. Segment 2 [t1, t2]: The inductor current continues to increase linearly during this segment up to a positive peak . Since the inductor voltvalue iL(t2) > 0, where age is vL = V1 + NV2, the current increment is (4) where iL(t2) is the inductor current value at the instant of t2. Ts = 1 ⁄ fs and fs is the switching frequency. Segment 3 [t2, t3] and 4 [t3, t4]: Due to the half-wave symmetry of the operation, it is sufficient to deduce the equations of the inductor current for only a half cycle. However, using a similar analysis to the one described in the previous two segments (1 and 2), these can be obtained for the remaining segments (3 and 4) as

where I1 and I2 are the instantaneous values of the inductor current the instant that two full bridges are switched. After some algebraic manipulations using Eqs. (3), (4), and (7), I1 and I2 can be obtained as (8)

(9) where d = ϕ / π is the phase-shift ratio. Main Operation Mode (m = 1): As seen in Figure 2, the two instantaneous values of the inductor current are equal to each other, I1 = I2. Thus, since V1 = NV2 for this mode, this can be calculated using Eq. (8) or (9) as (10) Buck Operation Mode (m < 1): In this mode, as deduced from Figure 3, the relationship between the two instantaneous values of the inductor current can be written as I2 > I1. Depending on the load conditions or the average transferred power, I2 is always a negative value at the beginning of the switching cycle, but I1 can be a positive or negative value at the end of the first segment; I1 > 0 and I1 < 0 for heavy and light loads, respectively. The boundary load condition results when I1 = 0. Hence, considering Eq. (8) with I1 = 0, we obtain (11)

where ϕbuck is the phase-shift angle for the boundary load condition of buck mode. Besides, by substituting Eq. (11) into Eq. (9), the instantaneous value I2 in Figure 3(b) can be calculated as

Table 1. Phase-shift angles depending on the load conditions for each operation mode Load Conditions Operation Mode

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It is noted that Eq. (12) holds for only the boundary phase-shift angle, ϕ = ϕbuck. Eqs. (8) and (9) still represent I1 and I2 for other conditions, ϕ > ϕbuck and ϕ < ϕbuck. Boost Operation Mode (m > 1): Similar definitions above could be performed for the boost operation mode. As given in Figure 4, the difference is that the relationship is I1 > I2, and I2 emerges as I2 < 0 and I2 > 0 at the beginning of the switching cycle under heavy and light loads, respectively. The boundary load condition occurs this time for I2 = 0. Hence, considering Eq. (9) with I2 = 0, we obtain (13) where ϕboost is the phase-shift angle for the boundary load condition of boost mode. In addition, the substitution of Eq. (13) into Eq. (8) results in (14) It is noted that Eq. (14) holds for only the boundary phase-shift angle, ϕ = ϕboost. Eqs. (8) and (9) still represent I1 and I2 for other conditions, ϕ > ϕboost and ϕ < ϕboost. Table 1 summarizes the phase-shift angles depending on the load conditions for each operation mode. Average Values The output current of the secondary side bridge is a rectified version of the inductor current, as shown in Figure 2. Due to the symmetry of the inductor current, the average output current is derived for a semi-period as (15) where I̅2́ denotes the average of the output current, and Ashaded is the sum of the shaded areas given in Figure 2. Then, Ashaded can be calculated by

(19) The above analysis was performed for the main operation mode (m = 1). The given average expressions can also be reached on the basis of the waveform of i2́ for the buck (m < 1) or boost (m > 1) modes. The shaded areas in Figure 3(a) and Figure 4(a) constitute the data used to obtain the same average values. The average expressions in Eqs. (17), (18), and (19) are actually for forward power flow. For both power flows, the unified expressions can be rearranged as follows: (20)

(22) where XL = 2πfsL and the phase-shift angle is 0 < ϕ < π/2 and -π/2 < ϕ < 0 for forward and backward (reverse) power flow. Figure 5 illustrates the characteristic curves of output power versus phase-shift angle for bidirectional power flow, where the voltage conversion ratio m was taken as a variable parameter. This shows that the output power and d = ϕ / π have a parabolic relationship, and accordingly, the nonlinearity of the output power will be more severe with an increasing value of d. The region of soft-switching for both bridges is also identified in Figure 5. For m = 1, the output power characteristic is enclosed by the soft-switching boundaries, and thus all devices can be operated under soft-switching in the full range of d. However, the control range is narrowed in the buck or boost operations, and

(16) and substituting Eq. (10) into Eq. (16), the average output current I̅2́ is (17) Hence, the average output power is (18) On the other hand, assuming all losses are neglected, the average supplied power is equal to the output power, that is P1 = P2 or V1 I̅1́ = V2́ I̅2́. Then, the average supplied current I̅ 1́ is obtained as

Figure 5. Characteristic curves of output power versus phase-shift angle for different voltage conversion ratios.

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hard-switching may occur in some load conditions. The soft-switching region of operation of the DAB converter will be discussed in detail later.

chosen large enough to provide significant filtering of the switching ripples. Eq. (24) indicates that, for a particular fs, L, and V1, the output voltage is proportional to RL and has a parabolic relationship with d. Therefore, for a given RL, the output voltage reaches its maximum value when d = 0.5. Also, for a given d, the operating modes directly depend on the value of RL, and the main operation mode occurs when RL is equal to its boundary value. Using Eq. (24), the boundary load resistance for NVo= V1 (m = 1) can be calculated by

Output Voltage To express the output or load voltage, let us assume a simple schematic of the converter given in Figure 6(a), where a load resistor RL is attached to the output of the secondary side bridge instead of an active load. Unlike Figure 1, the operation is now unidirectional, and the power flow is from the source to the passive load. In this circumstance, the output power for a fixed resistive load is defined as

where 0 < d < 0.5. Under heavy load conditions for d > ϕbuck / π, when RL < Rbound, the buck operation occurs. Otherwise, the boost operation arises from RL>Rbound, in which d > ϕboost / π for heavy loads. As shown in Figure 6(a), the load current is io = i2 - iC. Assuming the peak-to-peak current ripple ∆Io is small enough to be neglected, then it means ∆I2= ∆IC. Thus, the load current is also considered constant, and Io = N I̅2́ or Io = Vo/RL. From Eq. (17) or (24), the load current is obtained as

and combining with Eq. (18), the load voltage can be expressed as (24) where Vo is the load voltage, and it can be considered constant at steady-state when the output filter capacitor is

Figure 6. (a) Simplified circuit diagram used for load voltage and output ripple analysis. Current ripple in the output capacitor for (b) Buck (m < 1, ϕ > ϕbuck), (c) Main (m = 1), and (d) Boost (m > 1, ϕ > ϕboost) operation modes, where ió is load current reduced to the primary side.

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(26) The load current Io along with the output current i2 of the secondary side bridge and the capacitor current iC for each operation mode are shown in Figure 6(b), Figure 6(c), and Figure 6(d). Here, the output waveforms only for heavy load conditions are discussed. Voltage Ripple Analysis All switched-mode power supplies have an inherent switching phenomenon, which causes an undesired ripple in the load voltage. Generally, the voltage ripple is directly proportional to the total charge accumulated (or discharged) across the output filter capacitor. The total charge corresponds to one of the positive or negative areas of the capacitor current in Figure 6. For buck operation mode (m < 1), the voltage ripple is defined as

Similarly, the ripple analysis for the other two operation modes should also be carried out individually because the total charge contained across Co is different in each mode. In this context, using the shaded areas in Figure 6(c) and Figure 6(d), the total charges are obtained as (34)

(35) Then, the peak-to-peak voltage ripples for m = 1 and m > 1 are

where ∆Vo,buck is the peak-to-peak voltage ripple, and ∆Qbuck is the total charge accumulated across Co. Considering the shaded areas in Figure 6(b), ∆Qbuck can be calculated by

(28) where ta and tb are derived from Eqs. (4) and (5) as (29)

(32) Eventually, the rearrangement of Eq. (28) using the last equalities yields (33) where

The voltage ripple is a significant parameter used to determine the output filter capacitor. In a well-designed converter, the output capacitor is chosen to keep the percentage ripple usually less than 1 - 2%. The percentage ripple is defined as , where Vo is the steady-state value of the load voltage. More details on the output capacitor selection will be presented under the Design Guidelines. Soft Switching Operation In the DAB converter, the switches on the same leg in both active bridges operate in a complementary manner (see Figure 2). Thus, to prevent a possible short circuit, a dead-time should be implemented during which both switches are turned off. Throughout this dead-time, the output parasitic capacitances of the switches that will be turned from off to on are discharged with the energy stored in the inductor, and the voltages across them drop to zero before they are turned on. The voltage across the switches being zero at the instant of turn-on is known as zero-voltage switching (ZVS). ZVS is a phenomenon that provides soft-switching transients and reduces switching losses. Examining the gate signals in Figure 2, ZVS for the secondary side bridge occurs during the transitions from segment 1 to 2 and segment 3 to 4, while the primary side bridge executes it during other consecutive segments (segment 2 to 3 and segment 4 to 1).

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Figure 7. (a) Representation of the ZVS boundaries for the primary and secondary side full bridges. Influences of transformer magnetizing inductance (b) and device output capacitances (c) on the ZVS region of operation.

As stated earlier, provided that m = 1, ZVS is maintained over an entire power range for both full bridges. However, when m is not equal to 1, and as the handled power is reduced (at light loads), the ZVS region narrows gradually. It may even disappear for certain values of m and d. For this reason, when m < 1 or m > 1, ZVS will be fulfilled only under the heavy load cases discussed previously. As can be easily deduced from Figure 3(a) and Figure 4(a), the ZVS conditions for the primary side bridge are

(41) These two conditions are depicted in Figure 7(a), where the bold curves enclose the region of operation of the DAB converter under ZVS. The x-axis represents the normalized output current and phase-shift angle (with different scales), while the y-axis represents the voltage conversion ratio. From Eq. (17), the normalized output current is given by (42)

Due to the half-wave symmetry of the inductor current, the given conditions can be simplified to I2 > 0 and I1 > 0. From Eqs. (8) and (9), I1 and I2 can be rewritten as (38) (39) where In = V1 ⁄ XL is the nominal base current. Hence, using Eqs. (38) and (39), the necessary conditions to ensure ZVS for the primary and secondary side bridges are respectively obtained as

and (43) where R is the normalized load line. The intersection of the m and R lines gives the operating phase-shift angle ϕ. If this operating point is within the ZVS region, then the converter is expected to perform soft-switching. It is also seen from Figure 7(a) that ZVS will be satisfied only for certain values of m and I̅´2, and the operation under ZVS will be more possible with an increasing value of output current (which implies higher power transfer) even if m is quite different from 1.

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Some parasitic elements affect the ZVS region of the converter. The parasitic elements that have the most dominant effect are transformer magnetizing inductance and switch output capacitances. The above analysis was performed under the assumption that the magnetizing inductance is infinite and the output capacitances are neglected. Therefore, these ZVS boundaries are ideal curves and cannot always guarantee ZVS operation. An investigation into the influence of the parasitic elements on the ZVS region is presented in [14,20]. Based on these studies, the given conditions in Eqs. (40) and (41) to achieve ZVS in both bridges can be rearranged as

Table 2. Main requirements of the DAB converter to be designed Parameter

(45) where the transformer magnetizing inductance is defined as Lm = K × L and K ≥ 1. ILmin is the minimum inductor current required to ensure ZVS, that is I1 and I2 should always be higher than ILmin. It is described as

Table 3. Calculated circuit parameters for the designed DAB converter Parameter

Practical Design Considerations

where Coss is the switch output capacitance. Finally, the normalized output current is now expressed as (46) Using Eqs. (44), (45), and (46) and for Coss ≈ 0 or ωn≈ ∞, the influence of magnetizing inductance on the ZVS region is depicted for different K values in Figure 7(b). The extreme values of Lm are obtained for K = 1 and K = ∞. It is seen that the ZVS region widens as K decreases. Although the low magnetizing inductance seems to be an advantage, this causes the transformer utilization factor (TUF) to decrease. Nevertheless, K can be used as a trade-off mechanism to achieve efficient voltage conversion, especially under very light loads. Similarly, for K ≈ ∞, the influence of output capacitances on the ZVS region is depicted for different ωn values in Figure 7(c). It shows that decreasing ωn (increasing output capacitance) narrows the ZVS region. This is because the minimum current required to ensure ZVS rises as the capacitance value increases. Obviously, a good designer can keep the converter in the ZVS region by determining an appropriate inductor under certain operating conditions.

Design Guidelines The main design parameters are taken as the input and output voltages and the maximum power. The switching frequency is another known parameter, and its optimum value is chosen in line with the maximum volume and total loss limits of the converter. Taking these given parameters into consideration, the turn ratio N, inductor L, and output filter capacitor Co need to be determined, respectively. Two different design strategies have been presented in [20]: the first approach aims to increase the ZVS operating range to achieve good efficiency over a wide power range, and the second one aims to increase the converter efficiency at full load. In both approaches, the input voltage is considered constant, and how to calculate the inductance value that allows maximum power transfer is explained. A design procedure is not, nevertheless, presented for selecting the output capacitor. In this study, the first strategy is followed, and differently from [20], the proposed design steps address critical parameter selections in determining the inductance value for variable input voltage. The design equations for the output filter capacitor are also presented. The basic requirements for exemplary design are given in Table 2. Our example is set up on a 50W converter whose input voltage varies in the range of 36V < V1 < 60V. The output voltage is assumed to be constant and is selected as V2 = 5V. A simple design procedure for a wide input voltage range can be given as follows:

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Step 1: Calculation of N transformer turn ratio. As seen in Figure 7(a), an ideal design can be realized for m = 1 when the input voltage is constant. This is because the converter always remains in the ZVS region for the entire power range. However, if the input voltage is considered to vary between two distinct extremes, then operating points other than m = 1 also occur. To achieve an efficient conversion over a wide power range, the value of m should be kept close to 1. Thus, to determine the turn ratio, the input voltage can simply be taken as the arithmetic average . Then, the turn of two extreme points, i.e. ratio is calculated for V1* = 48V. Using Eq. (1), we obtain

maximum of ∆Vo, regardless of all these operation modes. This condition can be satisfied for ∆Q = ∆Qmax, where ∆Qmax= max(∆Q*buck, ∆Q*main, ∆Q*boost). Using Eqs. (33), (34), and (35), we obtain

(47) The calculated turn ratio N* = 9.6 causes the converter to operate in boost mode for the input voltage range 36V < V1 < 48V while the buck operation mode occurs for 48V < V1 < 60V. In this context, the voltage conversion ratio changes in the range of 0.8 < m < 1.333. The designer can modify the value of N* to boost the converter efficiency according to the operating conditions. It will be discussed in detail later in the next subsection. Step 2: Calculation of L inductance value. To ensure ZVS over a wide power range, as much energy as possible should be stored in the inductor; hence, the value of L should be as high as possible. The phase-shift ratio should also be selected high to increase the ZVS operation range on the one hand and to allow maximum output power on the other. From Eq. (18), the maximum value of L can be calculated as (48) where V1 is taken as V1min to prevent an increase in the RMS and peak currents of the converter. Theoretically, the highest value of d is 0.5, but dmax is never chosen as 0.5. To establish a linear relationship between the phase-shift ratio and the output current or voltage, dmax is taken as 0.4 or even 0.35. Consequently, the maximum of L is calculated as 82.944μH. Step 3: Calculation of Co filter capacitance value. As stated previously in the output ripple analysis (for a resistive load), the minimum value of the output filter capacitor that will allow the desired ripple voltage is calculated as (49) It is known that the converter can operate in either buck, main, or boost operation modes depending on the selected turn ratio N* and the input voltage range. The purpose of the design is to keep the output voltage ripple at a

where ∆Q*buck, ∆Q*main, and ∆Q*boost are the calculated values for the worst cases of the input voltage. ∆Q*buck, ∆Q*main, and ∆Q*boost are obtained 62.5μC, 71.111μC, and 66.694μC, respectively. Then, ∆Qmax becomes equal to 71.111μC. As a result, to keep the voltage ripple across Co below 100mV, the minimum value of Co is calculated from Eq. (49) as 711.11μF. The circuit parameters of the designed converter are presented in Table 3. They will be used in later simulation studies. Computational Analysis This section presents some computational analysis on the ZVS boundaries of primary and secondary side bridges and steady-state values for the designed converter. First, the minimum operating conditions to operate both bridges within the ZVS region have been investigated for two extreme points of the input voltage. Whether the relevant bridge will perform soft-switching is determined by the boundary load condition, and if the converter operates under heavy load conditions, then both bridges always run in the ZVS region. In the case of m = 0.8, the phase-shift angle for the boundary load condition is calculated as ϕ = 0.3142 from Eq. (11), and thus the phase-shift ratio d = ϕ/π becomes equal to 0.1. Similarly, using Eq. (13), the boundary load condition for m = 1.333 occurs at ϕ = 0.3924 or d = 0.1249. Accordingly, the heavy load conditions arise when d > 0.1 and d > 0.1249 for m = 0.8 and 1.333, respectively. Further, the normalized average output currents for the heavy load conditions d > 0.1 and d > 0.1249 are respectively calculated as I̅´2 > 0.2827 and I̅´2 > 0.3434 from Eq. (42). This means that the average load current from Eq. (26) or Io=NIn I̅´2 (pu) should not fall below 6.249A for m = 0.8 and 4.554A for m = 1.333 to operate the converter in the ZVS region. If Io < 6.249A for m = 0.8, the light load condition occurs, and the primary side bridge performs hard-switching. Similarly, the light load condition occurs when Io < 4.554A for m = 1.333, and the secondary side bridge performs hard-switching. Table 4 summarizes the minimum operating conditions to remain the primary and secondary bridges in the ZVS region for two extreme points of the input voltage. Second, some open-loop simulations have been realized to evaluate the calculated steady-state values. Figure 8 shows the open-loop current and voltage waveforms for (m = 0.8), 1, and 1.333, respectively. The converter was operated under

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Table 4. Minimum operating conditions to operate both bridges within the ZVS region for two extreme points of the input voltage

Table 5. Computational and simulation results of steadystate values for m = 0.8, 1, and 1.333

the rated load condition (Io = 10A), and the phase-shift ratio corresponding to each m was calculated from Eq. (18) as d = 0.1744, 0.2354, and 0.4, respectively. The simulated waveforms in Figure 8 are quite analogical compared to the basic theoretical waveforms. The instantaneous values I1 and I2 of the inductor current are calculated by Eqs. (8) and (9), and they match the simulated values. It is also seen that the peak-to-peak voltage ripple ∆Vo is less than 100mV for each operating mode. The comparison of computational and simulation results is presented in Table 5. Transformer Turn Ratio Trade-Offs The transformer turn ratio is a key factor in determining the operation modes (buck or boost modes) in a DAB converter, as seen in Eq. (1). When considering the entire power range, the turn ratio also plays a vital role in characterizing

the voltage and current profiles across the total inductor. The inductor voltage is the difference between the primary and secondary voltages of the transformer, and the slope

Figure 8. Simulated open-loop current and voltage waveforms under the rated load condition for (a) Buck (m = 0.8), (b) Main (m = 1), and (c) Boost (m = 1.333) operation modes.

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of the inductor current is defined by Eq. (2). As shown in Figure 2, when V1 = NV2, the slope becomes zero, and the inductor current always changes in a trapezoidal profile. When V1 > NV2 or V1 < NV2, the inductor current varies with the positive or negative value of the slope, and thus the current profile contains spikes or peak points as illustrated in Figure 3 and Figure 4. The value of the peak currents increases dramatically when the mismatch of the voltages on both sides of the transformer heightens to a considerable degree. The current profile with large peaks increases the RMS value of the current across the primary and secondary sides. The RMS value of the primary side current can be calculated using the waveform of iL in Figure 3(a) and expressed as

and the RMS value of current, three designs meeting the main requirements in Table 2 but with distinct turn ratios are considered. The first one is the converter designed in the previous subsection, and V1* = 48V, N* = 9.6. The second and third designs are respectively realized for V1* = 40V and V1* = 56V, and the turn ratios N* are found as 8 and 11.2. Also, the other circuit parameters for the second and third designs are L = 69.12μH, Co = 871.2μF and L = 96.768μH, Co = 1500μF, respectively. The change in the primary RMS current of each design through the entire power range is shown separately in Figure 9 for three input voltages (V1min, V1*,V1max). The minimum RMS current profile in the given designs occurs for V1 = NV2 or m = 1 through almost the entire power range, and this profile decreases proportionally as the value of N increases. Moreover, depending on the increasing N value, the RMS current profile for the maximum value V1max = 60V of the input voltage approaches the minimum current profile. The maximum RMS profile occurs when the input voltage tends to its minimum value V1min = 36V, and thus the RMS

(51) and the RMS value of the secondary side current is Is,rms = NIp,rms. To illustrate the relationship between the turn ratio

Figure 9. Change of the primary RMS current for three different transformer turn ratios: (a) N = 8, (b) N = 9.6, (c) N = 11.2.

Figure 10. Efficiency curves for three different transformer turn ratios: (a) N = 8, (b) N = 9.6, (c) N = 11.2.

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example, if the converter operates mostly at low input voltages under different load conditions throughout the entire operating period, then V1* can be chosen closer to the minimum input voltage. Such a case is presented in Figure 11 with green curves for V1* = 40V. Thus, the required load current to stay in the ZVS region further reduces for 36V < V1 < 43.818V when compared to the first design (i.e., the ZVS operation range widens); however, the minimum load current increases for input voltages higher than V1 = 43.818V (i.e., the ZVS operation range narrows). On the contrary, as the turn ratio increases, this time, the ZVS operating range becomes wider for the inputs close to the maximum input voltage (see blue curves in Figure 11). The point to be noted here is that high RMS current levels will occur at around the minimum values of the input voltage due to the increasing turn ratio, as deduced from Figure 9. The designers are advised to consider this trade-off when determining the turn ratio. The above considerations highlight the importance of determining an optimum transformer turn ratio based on operating conditions. The trade-offs associated with selecting an optimum turn ratio affect various aspects of converter performance, including RMS current levels, efficiency, heating, and ZVS operating range. Figure 11. Variation of the minimum average output current required for ZVS to the input voltage.

currents increase significantly. This is an important trade-off to consider when determining the transformer turn ratio. A high RMS current profile results in increased power losses in the transformer. For a given core size, higher voltage or current increases core losses, and a saturation problem may also be observed. Higher current leads to larger resistive losses, possibly leading to more heating in the windings. All these negatively affect the overall efficiency of the converter. Figure 10 depicts the converter efficiencies at similar operating conditions for these three designs. The efficiency analysis was conducted using Simcape Electrical Toolbox in Matlab. The dead time is taken as 100ns. As expected, the simulated efficiency curves change inversely with the RMS current profiles in Figure 9. The transformer turn ratio can also be used to configure the ZVS operating region of the converter. The minimum average output current that allows the converter to operate in the ZVS region decreases as the voltage conversion ratio m approaches one. This variation for the first design (N = 9.6) is depicted with red curves in Figure 11. For the other two designs (N = 8 and N = 11.2), they are plotted on the same figure with green and blue curves, respectively. By examining Figure 11, it can be concluded that the designer can modify the value of V1* depending on the operating conditions to keep the converter in the ZVS region. For

Practical Challenges In real-world applications, several practical challenges can arise due to component non-idealities, high-frequency transformer design, sensing mechanism noise, thermal management, and switch current ratings. These significantly affect the performance, reliability, and longevity of the converter. The following introduces a brief description of these difficulties: Component Non-Idealities: All electronic components such as resistor, capacitor, and semiconductor devices can never exhibit ideal theoretical behavior. Non-ideal behaviors typically stem from manufacturing imperfections, nonlinear characteristics, and environmental factors. Tolerance, aging, parasitic effects, and temperature dependence of components are only some of their non-idealities. High-Frequency (HF) Transformer Design: HF transformer design involves unique challenges due to the complex interplay of electrical, magnetic, thermal, and mechanical factors. At high frequencies, core losses (hysteresis and eddy current losses) reduce efficiency and generate heat. Hysteresis losses can be mitigated by using core materials, such as ferrites or nanocrystalline alloys. Similarly, using laminated or powdered cores can reduce eddy current losses. Ferrite cores are commonly preferred in high-frequency designs because of their high resistivity. High-frequency currents also tend to increase winding losses (skin and proximity effects). The skin effect causes a decrease in the effective cross-sectional area and an increase in the AC resistance. To reduce losses due to the skin effect at high frequencies, Litz wire can be used instead of solid copper wire in the windings. The proximity effect causes

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non-uniform current distribution and additional losses. This can be somewhat reduced at high frequencies by optimizing winding geometry or using interleaved windings. The transformer parasitic capacitances (inter-winding capacitance and winding self-capacitance) result in unwanted resonances and signal distortion, and their effects become more intense at high-frequency operation. To minimize the effects of parasitic capacitances, shielding layers between windings and techniques like sectional winding can be used. Finally, high-frequency transformers generate electromagnetic interference (EMI), which can disrupt nearby electronics and violate regulatory and safety standards. Shielding and filtering techniques can be implemented to reduce EMI. Sensing Mechanism Noise: Measuring physical quantities such as current and voltage is critical to all power electronics circuits, but the accuracy and reliability of measurements can degrade when they are subject to noise and interference. Sensing mechanisms are susceptible to noise from various sources, such as thermal noise, shot noise, and EMI. Quantization noise is another factor that occurs during the process of converting an analog signal into digital form and limits measurement resolution and accuracy, especially in high-precision applications. Besides, environmental interference like temperature fluctuations, humidity, or vibrations and cross-talk between different sensor lines or components can cause noise or drift in sensor readings.

Thermal Management: Many electronic components, especially semiconductor devices, generate considerable heat during operation at high frequencies under high power. The produced heat should be effectively dissipated without allowing critical components to exceed their thermal limits. Otherwise, it can lead to failure, reduced efficiency, and even permanent damage. Therefore, it is critical to balance heat generation and dissipation to ensure safe operation. The heat dissipation method varies depending on power rating, design dimensions, and design purposes, but it generally involves using passive methods like heat sinks or active methods like fans or liquid cooling systems. Switch Current Rating: To operate a switch within its safe limits, it is also necessary to consider its voltage and current ratings along with its power dissipation capacity and thermal management. The current rating of a DAB converter is determined by the total inductance design, and real designs usually focus on this aspect. The maximum value of the inductance that will provide the maximum output power was obtained in the Design Guidelines subsection. Choosing a smaller inductance than its maximum value brings a high current impact on the transformer and switches. This is illustrated in Figure 12, which gives the variations of the primary and secondary side RMS currents to the total inductance. The simulation results are obtained for N* = 9.6 and three switching frequencies (15, 30 and 50kHz) at the maximum output power, considering only

Figure 12. Variations of the RMS currents to the total inductance; (a) for the primary side bridge, (b) for the secondary side bridge.

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the two extreme points of the input voltage. As can be seen, the maximum value of the inductance increases to ensure the maximum output power at low switching frequencies. In fact, Figure 12 also refers to the current rating limits within which a switch can operate without causing damage or failure. For example, let IRF830A Power MOSFET for the primary side bridge and IRFP460B Power MOSFET for the secondary side bridge be selected as the switching devices. Both MOSFETs can withstand a voltage of 500V and exhibit a good voltage-blocking capability for the present design. On the other hand, the IRF830A can handle continuous drain currents of 5A at TC = 25°C and 3.2A at TC = 100°C at the most. These currents for the IRFP460B are 20A and 13A at TC = 25°C and 100°C, respectively. TC is the case temperature of MOSFET. These current endurances are relatively low, and therefore the inductance value should be selected carefully. For this, the current limitations of MOSFET devices are also shown in Figure 12. If the primary side MOSFET is switched at 15kHz, the inductance must be between 24.11μH and 276.48μH to safely meet the 50W power requirement. Under poor thermal management, device failures may occur for the inductance values selected between 24.11μH and 39.29μH. Thus, it is recommended not to choose a small inductance for low switching frequencies. Similarly, if the secondary side MOSFET is operated at 15kHz, the current exceeds the threshold when L < 69.6μH, and it is damaged during maximum power transmission. More importantly, the device is likely to fail under bad thermal management, especially for input voltage V1 = 36V. This issue can also be experienced at other switching frequencies. Thus, to guarantee safe operation, it is recommended to select a MOSFET with a continuous drain current greater than 16.96A at TC = 100°C.

where vo* is the desired output voltage. kp and ki are the proportional and integral coefficients, respectively. In this scheme, only measuring the actual output voltage is sufficient to achieve voltage control. The TVL control can exhibit a fast dynamic response to the output voltage step change, however, the response is substantially slower when there is a change in the load current. Load Current Feed-Forward (LCFF) Control: To eliminate the slow load transient response during voltage mode control, the TVL control scheme can be improved by combining it with the load current feedforward. This scheme has a cascade structure that consists of an inner current loop and an outer voltage loop. The block diagram of the LCFF control is given in Figure 13(b), where the desired phase-shift ratio is generated as

Control Strategies

The study discusses five different PI-based control strategies, namely TVL, LCFF, e-MPS, DP, and VDP controls, as well as MPS control. These are briefly examined for unidirectional power flow, where the secondary side bridge feeds a passive load. Figure 13 shows the block diagram of all these control schemes. Traditional Voltage Loop (TVL) Control: The block diagram of the TVL control scheme is shown in Figure 13(b). This traditional scheme comprises a simple voltage loop. The desired phase-shift ratio is generated from the proportional gain of the output voltage error. The integral gain can be used to cope with the nonlinearities in the relationship and to improve the generated phase-shift ratio. Thus, the desired phase-shift ratio d* is directly produced as (52)

(53) where k is the feedforward gain. It is clear from Eq. (53) that the load current needs to be measured as well as the output voltage to implement it. With the LCFF control, a better dynamic response can be achieved under load variations compared to the TVL control. Model-Based Phase-Shift (MPS) Control: According to the MPS control [46,47], the desired phase-shift ratio is derived from Eq. (24) as (54) To evaluate Eq. (54), the load resistance should be estimated online. Simply, it is identified as RL = vo ⁄ io [50], and the substitution of it into Eq. (54) leads to (55) It is obvious from Eq. (55) that the desired phase-shift ratio is dependent on the inductor L, the transformer turn ratio N, and the switching frequency fs. Thus, to calculate the value of d* with high accuracy, these parameters should be extremely accurate. Further, it is also necessary to sense the load current and input voltage precisely. Otherwise, all of them cause the phase-shift ratio to be incorrect and hence the output voltage control to deteriorate. The block diagram of the MPS control scheme is given in Figure 13(c). In practice, the large output filter capacitor prevents the output voltage from varying immediately when the load resistor changes. This slow rate of change in the voltage affects the estimation performance of the load resistance. Thus, the MPS control can exhibit a relatively poor dynamic response to the load current changes, particularly step changes.

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(f) Figure 13. Control schemes for DAB converter; (a) DAB converter and measurement points, (b) TVL and LCFF control, (c) MPS control, (d) e-MPS control, (e) VDP control, (f) DP control.

To improve the dynamic performance, especially at light loads, a PI controller is adopted for this scheme [46,47], as given in Figure 13(d). The output of the controller ∆d is defined by (56) and the enhanced phase-shift ratio is then d = d* + ∆d, where d ∈ [0,0.5]. For the e-MPS scheme, the load resistance can be estimated from Eq. (24) as follows [46]:

(57) Combining Eq. (54) with Eq. (57) yields (58) where dinit is an arbitrary initial value. In this scheme, the desired phase-shift ratio is independent of constant

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parameters, and only sensing the output voltage is sufficient to estimate it. The disadvantage is that dinit is set arbitrarily and cannot be changed later. Thus, the PI controller should be designed more carefully to compensate for it, otherwise the incorrectly identified d* emerges as a large error in the output. Direct Power (DP) Control: From Eq. (20), the unified transmission power is

Virtual Direct Power (VDP) Control: In the VDP control [50], the unified transmission power is defined without fixed parameters L, N, and fs. From Eq. (59), it is (64) and the desired phase-shift ratio is determined as

(59) and solving Eq. (59) for the desired output power p2*, the desired phase-shift ratio is determined as

where p2* is the virtual desired output power. For unidirectional power flow, it is expressed as, (66) and (67)

As in Figure 6(a), the desired output power is, (61) where vo is relatively constant at steady-state, and dvo ⁄ dt is close to zero. However, this term appears during transient states such as voltage and load variation. Generally, dvo ⁄ dt can be approximated by ∆vo ⁄ Ts , where Ts is the sampling (or switching) period. Since the change of the output voltage along Ts is ∆vo = vo* - vo, Eq. (61) can be interpreted [48] as

(68) where vv* is the virtual desired output voltage, and io* is the desired load current. As seen above, the virtual voltage vv* is generated from a PI controller. Thus, it allows us to adjust the output voltage. Substituting Eq. (68) into Eq. (66) yields (69) Then, the desired value d for p2* > 0 is calculated from Eq. (65) by

(62) where the proportional controller compensates for the first term of Eq. (61), and kp should be chosen smaller than voCo ⁄ Ts to guarantee stability. Moreover, to improve the dynamic performance, an integral controller is also added to this scheme. Consequently, the desired value of d for p2* > 0 is calculated from Eq. (60) by (63) It is clear from Eq. (63) that d* is dependent on constant parameters, such as L, N, and fs. It is also necessary to feed forward the load current and input voltage precisely. The block diagram of the DP control scheme is presented in Figure 13(f).

(70) Unlike the MPSC and DPC schemes, the VDP control scheme is insensitive to the parameters L, N, and fs. Nevertheless, it requires additional measurements for the load current and input voltage feedforward as in the others. The block diagram of the VDP control scheme is shown in Figure 13(e). The major differences and strengths of the control strategies are summarized comparatively in Table 6. In addition, each control strategy balances the transient and steadystate performance of the converter as follows: • PI controllers in the TVL and LCFF schemes compensate for the error between the actual and desired output voltage, and they are used to generate the phase-shift ratio directly. In the LCFF control, the closed-loop output impedance is reduced by a load current feedforward,

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Table 6. General comparison of PI-based control strategies Control strategies

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thus providing a faster transient response during load current changes compared to the TVL control. There is no controller in the MPS scheme, and the desired phase-shift ratio is always calculated from output voltage, input voltage, and load current feedforward as well as circuit parameters. The transient and steadystate responses are highly dependent on measured quantities and circuit parameters, especially load resistor. The e-MPS scheme is an improved version of MPS control. The output of the PI controller in the e-MPS scheme is used as a correction term to enhance the calculated phase-shift ratio from the MPS scheme. Thus, the e-MPS control exhibits better dynamic performance compared to the MPS control. However, in both control schemes, a steady-state error may be observed since the desired phase shift ratio is still calculated depending on circuit parameters. PI controllers in the DP and VDP schemes is used to compensate for the difference between the calculation model and the physical model. The output of the PI controller in the DP scheme is used as a correction term to regulate the desired output power, and the phaseshift ratio is then estimated from this corrected output power. The calculation model is highly dependent on the measured quantities and circuit parameters, and thus this can cause a steady-state error to be observed. Finally, the VDP scheme is based on the virtual output voltage, and the phase shift ratio is estimated from this virtual voltage, which is included in the calculation and adjusted by the PI controller to obtain the desired output voltage. The dynamic performance of VDP control is free of circuit parameters, but the calculation model is affected by sampled quantities.

Simulation Results

Some simulation studies will now be presented to investigate and compare the dynamic performance of the given control strategies. To make a fair comparison, all controller parameters are optimized using Artificial Rabbits Optimization (ARO) algorithm developed in [61]. The ARO is a bio-based metaheuristic algorithm inspired by the survival strategies of rabbits in nature. Compared with some classical and latest optimizers, it generally performs better in solving benchmark functions and engineering problems. It has many superiorities, such as faster convergence, lower computational demand, and higher accuracy. In this study, the ARO algorithm is used to find the controller parameters that minimize the integral time absolute error (ITAE) performance criterion: (71) where e is the error signal. In the simulations, the control sampling time is chosen to be equal to the switching frequency, that is, the phase-shift ratio is updated at the end of each switching period. The optimized controller parameters for each control scheme are given in Table 7. Some performance metrics, such as settling time ts, percentage overshoot Mp, steady-state error ess, output voltage ripple at steady-state ∆Vo, and ITAE index, will be used to compare the transient and steady-state responses of control strategies. The performance comparisons will be performed for step variations in input voltage, load, and output voltage. These case studies are given as follows: Case 1: The first case study is conducted to investigate the dynamic performance of the control strategies under

Table 7. Optimized controller parameters for the given control strategies Parameters

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the load step changes. The simulation parameters are set as V1 = 48V, Vo* = 5V, and RL = 0.5Ω. Initially, the converter is operated under rated power. The load resistance steps from

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Table 9. Obtained transient response and steady-state characteristics during load current step changes Load Current 10A to 5A

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Figure 14. Simulated responses of output voltage and current during load step changes.

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Figure 15. Spider charts for performance comparison of control techniques under load current step changes.

during the load change from 10A to 5A is quite good, while it could not exhibit a similar performance as expected in the load change from 5A to 10A. However, these two responses are still better than those of the TVL, LCFF, and MPS controls. As a result, the best transient responses have been achieved by the e-MPS and VDP controls, respectively. All control strategies have almost the same peak-topeak ripples (≈ 18mV and ≈ 59mV for each step change, respectively) in the output voltage. It is further seen from Table 9 that the VDP control has better steady-state performance than other control methods when the ITAE index and steady-state error are evaluated. The obtained transient and steady-state results are represented with spider charts in Figure 15 to enable an illustrative comparison among the control strategies. Case 2: The second case study is done to examine the dynamic performance of the control strategies under the input voltage step changes. The simulation parameters are initially set as V1 = 48V, Vo* = 5V, and RL = 0.5Ω. Recall that the converter is designed for input voltages within the range of 36V < V1 < 60V. Hence, the worst conditions, that is only two extremes of the input voltage, have been considered in

the simulation. First, the input voltage steps down from 48 to 36V at t = 0.01s, and then steps up form 36 to 60V at t = 0.03s. Figure 16 shows the output voltage and current responses for each control scheme. The transient response and steady-state characteristics of the output voltage during input voltage changes are given in Table 10. From Table 10 and Figure 16, the TVL and LCFF controls have the longest settling time of over 1ms in both the input voltage step-down and step-up conditions, and the largest overshoot rate is also observed compared to the others. Furthermore, the e-MPS control almost keeps the output voltage constant at the desired value with minimum settling time and overshoot. Consequently, it can be said that the e-MPS control exhibits an excellent dynamic performance during input voltage step changes, followed by the VDP, DP, and MPS controls, respectively. The lowest ripples in the output voltage (roughly 12mV) are observed for the TVL and LCFF controls when the input voltage is stepped down. All control strategies produce almost the same ripples around 32mV in the case that the input voltage is stepped up. Table 10 shows that the VDP control has still better steady-state performance when the ITAE index and

Table 10. Obtained transient response and steady-state characteristics during input voltage step changes Input voltage 48V to 36V

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Figure 16. Simulated responses of output voltage and current during input voltage step changes.

Figure 17. Spider charts for performance comparison of control techniques under input voltage step changes.

steady-state error are considered. Similar spider charts for the input voltage step changes are presented in Figure 17 to make it easy to evaluate the obtained results. Case 3: The final case study aims to compare the dynamic performance of the control strategies under the desired output voltage step changes. The simulation parameters are now set as V1 = 48V, Vo* = 5V, and R L= 1Ω. The desired output voltage steps from 5 to 7V at t = 0.01s, and subsequently steps down from 7 to 3V at t = 0.03s. Figure 18 shows the output voltage and current responses for each control scheme. The transient response and steady-state characteristics of the output voltage during its desired step changes are given in Table 11.

From Table 11 and Figure 18, the slowest transient response is obtained by the MPS control with settling times of 2.061 and 3.190ms. For the output voltage step-up condition, the fastest transient responses are achieved by the e-MPS, LCFF, VDP, TVL, and DP controls, respectively. However, for the output voltage step-down condition, the TVL, e-MPS, DP, LCFF, and VDP controls provide the fastest transient responses, respectively. As seen in Figure 18, the TVL and LCFF controls respond faster than the DP and VDP controls, but their settling times are long because of the large overshoot rate. Consequently, it can be said that the e-MPS control will be a good choice to regulate the output voltage when considering the overshoot rates. For step change from 5V to 7V, the ripple in the output voltage is

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Table 11. Obtained transient response and steady-state characteristics during output voltage step changes Output Voltage

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Figure 18. Simulated responses of output voltage and current during its desired step changes.

Figure 19. Spider charts for performance comparison of control techniques under output voltage step changes. around 60.8mV for the e-MPS control, and this is relatively low compared to the ripple voltages (≈75mV) achieved for other control strategies. The output voltage ripples are almost the same for the other step change, and it is about

18mV. Table 11 shows that the LCFF control has better steady-state performance when considering the ITAE index and steady-state error. Similar spider charts for the output voltage step changes are presented in Figure 19.

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Table 12. Overall performance comparison of control strategies Control strategies

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According to Figures 15, 17, and 19, an overall performance comparison that rates the control strategies against each other can be given in Table 12. From Table 12, it is easy to deduce that the e-MPSC scheme exhibits the best dynamic performance among other schemes, and the second-best performance is achieved with the VDPC scheme.

Conclusion

This paper offers a comprehensive overview of operation modes, steady-state analyses, design recommendations, and PI-based control strategies of the single-phase-shift DAB converter. The operating modes have been distinguished in accordance with the phase-shift angle, load conditions, and voltage conversion ratio. In general, three distinct operation modes occur based on the voltage conversion ratio m, and in this study, they are called main (m = 1), buck (m < 1), and boost (m > 1). It is observed that various inductor current waveforms occur for the buck and boost operation modes depending on the output current, however, for the main operating mode, the inductor current is always trapezoidal regardless of the load conditions. For this reason, the buck and boost modes are further divided into two sub-operation modes by a boundary condition, and in this study, these are referred to as heavy and light load conditions. By performing a detailed steady-state analysis of the inductor current, the boundary condition, i.e., the phase-shift angle at which the boundary load condition occurs, has been obtained separately for buck and boost modes. It can be said that the studies mentioned so far are actually complementary to the previous studies in literature. This paper also reports a detailed analysis of the output voltage ripple and a simple analysis of the soft-switching region. The output ripple analysis is important to determine the output filter capacitor. Unlike the previous studies, the ripple analysis has been realized individually for each operating mode (m = 1, m < 1, and m > 1) and only for heavy load conditions in this study. Furthermore, the soft-switching analysis has revealed that the ZVS is lost when the converter operates under light load conditions, and it is more possible to ensure the ZVS under heavy load conditions. Finally, this paper proposes some design recommendations that can allow a wider ZVS operation range, especially for a

wide input voltage range. More importantly, it also presents a comparative analysis of optimized PI-based control strategies for a DAB converter with SPS modulation. The simulation studies show that the e-MPS control exhibits a fast dynamic response under the load current, input voltage, and desired output voltage step change conditions. The second-best performance has been achieved with the VDP control.

Authorship Contribution

This study emerged within the scope of the master’s thesis done by U.O. at Giresun University, Department of Electrical and Electronics Engineering. All simulation studies were carried out by U.O. under the leadership of M.A.U., and all the authors equally contributed to this work.

Data Availability Statement

The authors confirm that the data that supports the findings of this study are available within the article.

Conflict Of Interest

The author declared no potential conflicts of interest concerning the research, authorship, and/or publication of this article.

Ethics

There are no ethical issues with the publication of this manuscript.

Statement On The Use Of Artificial Intelligence

Artificial intelligence was not used in the preparation of the article.

References

1. ing analysis has revealed that the ZVS is lost when the con- verter operates under light load conditions, and it is more [1] De Doncker RWAA, Divan DM, Kheraluwala MH. possible to ensure the ZVS under heavy load conditions. A three-phase soft-switched high-power-density Finally, this paper proposes some design recommendations dc/dc converter for high-power applications. IEEE that can allow a wider ZVS operation range, especially for a Trans Ind Appl 1991;27:63-73. [CrossRef] Sigma J Eng Nat Sci, Vol. 44, No. 3, pp. 1646−1673, June, 2026 1671
2. Zhao B, Yu Q, Sun W. Extended-phase-shift con- trol of isolated bidirectional dc-dc converter for Baumann ED. Performance characterization of a power distribution in microgrid. IEEE Trans Power high-power dual active bridge dc-to-dc converter. Electron 2012;27:4667-4680. [CrossRef] [CrossRef] IEEE Trans Ind Appl 1992;28:1294-1301. [CrossRef]
3. Freijedo FD, Rodriguez-Diaz E, Dujic D. Stable and passive high-power dual active bridge converters mization of a high current dual active bridge with interfacing mvdc grids. IEEE Trans Ind Electron a wide operating voltage range. In: 37th IEEE Power 2018;65:9561-9570. [CrossRef] Electronics Specialists Conference, Jeju, Korea
4. Hu J, Joebges P, Pasupuleti GC, Averous NR, (South); 2006. p. 1-7. [CrossRef] De Doncker RW. A maximum-output-pow- [16] Mi C, Bai H, Wang C, Gargies S. Operation, design er-point-tracking-controlled dual-active bridge con- and control of dual h-bridge-based isolated bidi- verter for photovoltaic energy integration into mvdc rectional dc-dc converter. IET Power Electron grids. IEEE Trans Energy Convers 2019;34:170-180. 2008;1:507-517. [CrossRef] [CrossRef] [17] Krismer F, Kolar JW. Accurate power loss model
5. Xiao Z, Lei W, Gao G, Zhang X, Hu L. Dual-terminal derivation of a high-current dual active bridge con- voltage feedforward based direct power control verter for an automotive application. IEEE Trans Ind scheme and stability analysis of dual active bridge Electron 2010;57:881-891. [CrossRef] converter in dc microgrid systems. IEEE Trans [18] Alonso AR, Sebastian J, Lamar DG, Hernando MM, Power Electron 2023;38:4475-4492. [CrossRef] Vazquez A. An overall study of a dual active bridge
6. Zhang X, Xu Y, Siddique A, Long Y, Xiao X. A for bidirectional dc/dc conversion. In: IEEE Energy microprocessor resource-saving dual active bridge Conversion Congress and Exposition, Atlanta, GA, control for startup and restart of three-stage mod- USA; 2010. p. 1129-1135. [CrossRef] ular solid-state transformer. IEEE Trans Power Del [19] Kirsten AL, Fraytag J, Cunico LM, De Oliveira TH, Carloto FG, Costa MAD. Series inductance 2020;35:1443-1454. [CrossRef] design of dual-active-bridge converter: Zvs range
7. Hu Y, Li Z, Zhang H, Zhao C, Gao F, Luo L, et al. with practical considerations. Int J Circ Theor Appl High-frequency-link current stress optimization of 2022;50:2423-2438. [CrossRef] cascaded h-bridge-based solid-state transformer
8. Rodriguez A, Vazquez A, Lamar DG, Hernando with third-order harmonic voltage injection. IEEE MM, Sebastian J. Different purpose design strate- J Emerg Sel Top Power Electron 2021;9:1027-1038. gies and techniques to improve the performance of [CrossRef] a dual active bridge with phase-shift control. IEEE
9. Zheng L, Kandula RP, Divan D. Soft-switching sol- Trans Power Electron 2015;30:790-804. [CrossRef] id-state transformer with reduced conduction loss.
10. Zhao B, Song Q, Liu W, Sun Y. Overview of dual-ac- IEEE Trans Power Electron 2021;36:5236-5249. tive-bridge isolated bidirectional dc-dc converter for [CrossRef] high-frequency-link power-conversion system. IEEE
11. Anurag A, Acharya S, Bhattacharya S, Weatherford Trans Power Electron 2014;29:4091-4106. [CrossRef] TR, Parker AA. A gen-3 10-kv sic mosfet-based [22] Hou N, Li YW. Overview and comparison of mod- medium-voltage three-phase dual active bridge con- ulation and control strategies for a nonresonant sin- verter enabling a mobile utility support equipment gle-phase dual-active-bridge dc-dc converter. IEEE solid state transformer. IEEE J Emerg Sel Top Power Trans Power Electron 2020;35:3148-3172. [CrossRef] Electron 2022;10:1519-1536. [CrossRef] [23] Bai H, Mi C. Eliminate reactive power and increase
12. Inoue S, Akagi H. A bidirectional dc-dc converter system efficiency of isolated bidirectional dual- for an energy storage system with galvanic isolation. active-bridge dc-dc converters using novel dual- IEEE Trans Power Electron 2007;22:2299-2306. phase-shift control. IEEE Trans Power Electron [CrossRef] 2008;23:2905-2914. [CrossRef]
13. Iyer VM, Gulur S, Bhattacharya S. Small-signal stability assessment and active stabilization of a strategy to minimize dual active bridge converter bidirectional battery charger. IEEE Trans Ind Appl losses. IEEE Trans Power Electron 2009;24:1826- 2019;55:563-574. [CrossRef] 1838. [CrossRef]
14. Costa PFS, Löbler PHB, Roggia L, Schuch L. Modeling and control of dab converter applied to for the digital control of an automotive bidirectional batteries charging. IEEE Trans Energy Convers dual active bridge. IEEE Trans Power Electron 2022;37:175-184. [CrossRef] 2009;24:2756-2768. [CrossRef]
15. Mirtchev AV, Tatakis EC. Design methodology based on dual control of a resonant dual active bridge evaluation of modulation techniques in single-phase converter for electric vehicle battery charging. IEEE dual active bridge converters. IEEE Open J Ind Trans Veh Technol 2022;71:2691-2705. [CrossRef] Electron Soc 2021;2:410-427. [CrossRef] 1672 Sigma J Eng Nat Sci, Vol. 44, No. 3, pp. 1646−1673, June, 2026
16. Pistollato S, Zanatta N, Caldognetto T, Mattavelli P. A low complexity algorithm for efficiency optimiza- ing power supplies. Unitrode Power Supply Design tion of dual active bridge converters. IEEE Open J Seminar Handbook, Application Note U-140; 1990. Power Electron 2021;2:18-32. [CrossRef] [40] Guacaneme J, Garcera G, Figueres E, Patrao I,
17. Li J, Luo Q, Mou D, Wei Y, Zhang X. Comprehensive Gonzalez-Medina R. Dynamic modeling of a dual optimization modulation scheme of low current active bridge dc to dc converter with average current level and wide zvs range for dual active bridge con- control and load-current feed-forward. Int J Circ verter with dead-zone control. IEEE Trans Power Theor Appl 2015;43:1311-1332. [CrossRef] Electron 2022;37:2731-2748. [CrossRef] [41] Terada K, Nakashima S, Nakashima D, Yanagi H,
18. Noroozi N, Poorfakhraei A, Zayed O, Elezab A, Ishizuka Y. A generalized design methodology of Keshmiri N, et al. Rms current minimization in a dual active bridge dc-dc converters for dc power sic-based dual active bridge converter using triple- distribution. In: IEEE Applied Power Electronics phase-shift modulation. IEEE Trans Ind Electron Conference and Exposition, Phoenix, AZ, USA; 2023;70:7173-7182. [CrossRef] 2021. p. 2593-2600. [CrossRef]
19. Liu B, Davari P, Blaabjerg F. An optimized hybrid modulation scheme for reducing conduction losses nent of current in dual active bridge converter. In: in dual active bridge converters. IEEE J Emerg Sel IEEE Applied Power Electronics Conference and Top Power Electron 2021;9:921-936. [CrossRef] Exposition, San Antonio, TX, USA; 2018. p. 323-
20. Tang Y, Hu W, Xiao J, Chen Z, Huang Q, et al. 330. [CrossRef] Reinforcement learning based efficiency optimi- [43] Nguyen TL, Griepentrog G, Phung VT. Modeling zation scheme for the DAB dc-dc converter with and control of dual active bridge converter with triple-phase-shift modulation. IEEE Trans Ind two control loops and output filter. In: 43rd Annual Electron 2021;68:7350-7361. [CrossRef] Conference of the IEEE Industrial Electronics
21. Tang Y, Hu W, Zhang B, Cao D, Hou N, Li Y, et al. Society, Beijing, China; 2017. p. 4683-4689. [CrossRef] Deep reinforcement learning-aided efficiency opti- [44] Gierczynski M, Grzesiak LM, Kaszewski A. mized dual active bridge converter for the distrib- Cascaded voltage and current control for a dual uted generation system. IEEE Trans Energy Convers active bridge converter with current filters. Energies 2022;37:1251-1262. [CrossRef] 2021;14:1-30. [CrossRef]
22. Lin F, Zhang X, Li X, Sun C, Cai W, Zhang Z. Automatic triple phase-shift modulation for DAB load step response for a bidirectional dc-dc con- converter with minimized power loss. IEEE Trans verter. IEEE Trans Power Electron 2013;28:371-379. Ind Appl 2022;58:3840-3851. [CrossRef] [CrossRef]
23. Li X, Zhang X, Lin F, Sun C, Mao K. Artificial- intelligence-based triple phase shift modulation for model and hybrid phase-shift control of a dual-ac- dual active bridge converter with minimized cur- tive-bridge converter. In: 34th Annual Conference rent stress. IEEE J Emerg Sel Top Power Electron of IEEE Industrial Electronics, Orlando, FL, USA; 2023;11:4430-4441. [CrossRef] 2008. p. 2840-2845. [CrossRef]
24. Sha J, Shen J, Wang H, Qiu G, Sun Y. Hybrid mod- ulation-based discrete extended-phase-shift control son of traditional phase-shift, dual-phase-shift, for dual-active-bridge dc-dc converter. IEEE Trans and model-based control of isolated bidirectional Ind Electron 2024;71:15633-15642. [CrossRef] dc-dc converters. IEEE Trans Power Electron
25. Lin F, Zhang X, Li X, Sun C, Zsurzsan G, et al. 2010;25:1444-1449. [CrossRef] AI-based design with data trimming for hybrid [48] Li K, Yang Y, Tan SC, Hui RY. Sliding-mode-based phase shift modulation for minimum-current-stress direct power control of dual-active-bridge dc-dc dual active bridge converter. IEEE J Emerg Sel Top converters. In: IEEE Applied Power Electronics Power Electron 2024;12:2268-2280. [CrossRef] Conference and Exposition, Anaheim, CA, USA;
26. Deng L, Zhou G, Bi Q, Xu N. Online reactive power 2019. p. 188-192. [CrossRef] minimization and soft switching algorithm for tri- [49] Tiwary N, Venkataramana NN, Panda AK, Narendra ple-phase-shift modulated dual active bridge con- A. Direct power control of dual active bridge bidirec- verter. IEEE Trans Ind Electron 2023;70:2543-2555. tional dc-dc converter. In: International Conference [CrossRef] on Power Electronics, Control and Automation,
27. Tong A, Hang L, Chung HSH, Li G. Using sam- New Delhi, India; 2019. p. 1-4. [CrossRef] pled-data modeling method to derive equivalent [50] Song W, Hou N, Wu M. Virtual direct power control circuit and linearized control method for dual-ac- scheme of dual active bridge dc-dc converters for tive-bridge converter. IEEE J Emerg Sel Top Power fast dynamic response. IEEE Trans Power Electron Electron 2021;9:1361-1374. [CrossRef] 2018;33:1750-1759. [CrossRef] Sigma J Eng Nat Sci, Vol. 44, No. 3, pp. 1646−1673, June, 2026 1673
28. Tarisciotti L, Chen L, Shao S, Dragicevic T, Wheeler P, Zanchetta P. Finite control set model predictive et al. Active disturbance rejection control using arti- control for dual active bridge converter. IEEE Trans ficial neural network for dual-active-bridge-based Ind Appl 2022;58:2155-2165. [CrossRef] energy storage system. IEEE J Emerg Sel Top Power
29. Nguyen ND, Lee Y. A model predictive voltage con- Electron 2023;11:301-311. [CrossRef] trol for dual-active-bridge dc-dc converter using [58] Ali M, Yaqoob M, Cao L, Loo KH. Disturbance- generalized averaging model. Int J Control Autom observer-based dc-bus voltage control for ripple 2023;21:2455-2463. [CrossRef] mitigation and improved dynamic response in two-
30. Li S, Kong D, Xu Y, Gao W, Kennel R, Heldwein ML. stage single-phase inverter system. IEEE Trans Ind A robust model predictive control for dual active Electron 2019;66:6836-6845. [CrossRef] bridge converters based on super-twisting observer
31. Wu Y, Mahmud MH, Zhao Y, Mantooth HA. and sensitivity analysis. IEEE J Emerg Sel Top Power Uncertainty and disturbance estimator-based robust Electron 2024;12:4665-4677. [CrossRef] tracking control for dual-active-bridge converters.
32. Doria-Cerezo A, Serra FM, Esteban FD, Biel D, IEEE Trans Transport Electrific 2020;6:1791-1800. Grino R. Comparison of first- and second-order [CrossRef] sliding mode controllers for a dc-dc dual active bridge. IEEE Access 2022;10:40264-40272. [CrossRef] [60] Shao S, Chen L, Shan Z, Gao F, Chen H, et al.
33. Bagheri F, Guler N, Komurcugil H, Bayhan S. An Modeling and advanced control of dual-active- adaptive sliding mode control for a dual active bridge dc-dc converters: A review. IEEE Trans bridge converter with extended phase shift modula- Power Electron 2022;37:1524-1547. [CrossRef] tion. IEEE Access 2023;11:91260-91274. [CrossRef] [61] Wang L, Cao Q, Zhang Z, Mirjalili S, Zhao W.
34. Tiwary N, Naik V, Panda AK, Narendra A, Lenka Artificial rabbits optimization: A new bio-inspired RK. A robust voltage control of DAB converter meta-heuristic algorithm for solving engineer- with super-twisting sliding mode approach. IEEE J ing optimization problems. Eng Appl Artif Intell Emerg Sel Top Ind Electron 2023;4:288-298. [CrossRef] 2022;114:1-31. [CrossRef]

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